1. Field of the Invention
The present invention relates to a method of forming a contact of a semiconductor device, and more particularly to a method of forming a contact of a semiconductor device which can improve a process yield and reliability in accordance with forming a contact hole easily without the process of removing an extra etching barrier as a formation of a contact of an upper conductive layer contact hole located on top of a lower conductive layer under a self-alignment contact process.
2. Description of the Prior Art
In reference, referring to the contact hole connecting the top and bottom conductive wire in the semiconductor device, the size of a hole and the interval between the wires around the hole are reduced, while the aspect ratio, the ratio of a diameter and a depth of the contact hole are increased.
Accordingly, in a highly integrated semiconductor device having conductive wires of multi-layers, an accurate and stern alignment between masks in the fabricating process to form the contact is essential; thus there is a reduction in the processing tolerance state.
The contact hole forms a mask upon considering these main factors: just as a mis-alignment tolerance in aligning masks, a lens distortion at the time of the exposure process, a critical dimension variation at the time of a mask fabrication and photo etching process, and a registration between masks, and etc. in order to maintain the interval thereof.
Further, a self-alignment contact (hereinafter, called SAC) formation technique was developed to overcome the limitation of the lithography process when the contact hole is formed.
In the conventional process of forming the semiconductor device, the contact hole is formed in a manner of self-alignment since the mis-alignment between the upper and lower conductive layers becomes smaller when the contact hole is formed at the substrate of the semiconductor device from the upper conductive layer.
Currently, there is a general method which should prevent shorts between the upper and lower conductive layers, even though mis-alignment occurs since the barrier material to a dry etching is formed at the top of the lower conductive layer.
As explained above, the conventional contact formation method of the semiconductor device has these problems:
In regards to the conventional contact formation method of the semiconductor device, the etching barrier mentioned above functions as the etching barrier when it is necessary that the contact hole is formed from the upper conductive layer to the lower conductive layer. In the actual process, it has an additional process which removes the etching barrier from the portion on which the contact is required for the lower conductive layer from the upper conductive layer when mask process is used separately.
In addition, another problem exists where process yield and reliability deteriorated due to the complicated process because each process is proceeded by referring to the contact formed at the top of the substrate of the semiconductor device from the upper conductive layer, and the contact hole formed to the top of the lower conductive layer.